Five Ways NVIDIA Co-Design Maximizes the Value of Every Byte in the AI Factory
New NVFP4 format and wide expert parallelism let Vera Rubin NVL72 deliver up to 30× higher throughput per megawatt while keeping 288 GB HBM per GPU.
NVIDIA announced five co‑design strategies that together raise the value of each byte in its AI factory.
Wide expert parallelism spreads MoE experts across eight or more GPUs, freeing more HBM per GPU for KV cache and increasing arithmetic intensity.
NVLink interconnect links 72 GPUs into a single memory pool, while the Vera CPU adds 88 Olympus cores and up to 1.5 TB of LPDDR5X, staging idle KV cache.
These levers let the Vera Rubin NVL72 achieve up to 30× the throughput per megawatt of the earlier GB300 NVL72, with the same 288 GB HBM per GPU.
NVFP4 also halves KV‑cache footprint versus FP8, allowing roughly twice as much context to stay on‑device.
Ce que cela signifie pour vous
For AI developers, the higher throughput per power unit means larger batch sizes and longer context windows without extra hardware cost. Users of free or locally hosted models benefit from the reduced memory demands, making high‑quality inference more accessible on existing GPU resources.
Sources
- Five Ways NVIDIA Co-Design Maximizes the Value of Every Byte in the AI Factory, NVIDIA Developer (official), 5 Nov 2026
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